SambaNova SN50 heads to Supermicro inference racks on November 3, 2026

SambaNova said on November 3, 2026 that Supermicro will build and sell inference racks that pair its SN50 chips with Nvidia GPUs, with an initial plan for 10,000 SN50 chips. In the SambaNova announcement, the GPUs handle the prefill phase (reading the prompt) and the SN50 chips handle decode (writing the answer). Supermicro will integrate, test, deliver and support the systems, starting with neoclouds and sovereign clouds before enterprise data centers.

Neither company gave a price, a ship date for the Supermicro racks, a rack configuration or a named customer. SambaNova says the two companies can deliver “substantially more high-performance inference capacity in 2027” than would otherwise be possible.

SambaNova SN50 specs

The SN50 is SambaNova’s fifth-generation RDU (Reconfigurable Dataflow Unit), announced on February 24, 2026 with shipments to customers planned for the second half of 2026. The figures below come from SambaNova’s own RDU product page, its SN50 datasheet and its Hot Chips 2026 write-up, checked November 4, 2026.

Two things stand out in that table. First, the SN50 does not move to a newer memory generation: it keeps 64 GB of HBM2E, a generation SK hynix put into mass production in July 2020, while Nvidia’s Rubin GPU and AMD’s Instinct MI400 series use HBM4 (the generations are compared in our HBM memory explainer). SambaNova’s design leans on the 432 MB of on-chip SRAM and a large DDR5 tier instead, placing hot data in SRAM, active weights and hot KV cache in HBM, and prompt caches and other models in DDR5.

Second, SambaNova’s own documents disagree on the DDR5 ceiling: the product page lists up to 512 GB per chip, while the SN50 datasheet and the SambaRack SN50 datasheet list up to 2 TB. We show both until SambaNova reconciles them.

SambaNova does not publish an HBM bandwidth figure or a per-chip power rating for the SN50.

What a SambaRack SN50 adds up to

SambaNova’s own rack, the SambaRack SN50, holds 16 SN50 chips (two nodes of eight). Multiplying SambaNova’s per-chip figures gives the rack totals below; this is our arithmetic, not a figure SambaNova publishes.

SambaNova describes 20 kW as the rack’s average draw in its launch post and its September 28 sovereign AI post; the SambaRack SN50 datasheet lists power consumption of 16 kW per node and 32 kW for two nodes, which reads as a rated rather than average figure. On compute, SambaNova says the SN50 delivers five times the compute per accelerator of the SN40, which matches 3,200 FP8 TFLOPS against the SN40’s 640.

For scale, the 10,000 chips in the Supermicro plan would carry 640 TB of HBM2E in total (10,000 × 64 GB), and equal the chip count of 625 SambaRacks. Supermicro’s racks are its own design built alongside Nvidia GPUs, so the SambaRack power figure does not carry over to them.

Why split prefill and decode

Generating text with a large model has two phases. Prefill processes the whole prompt at once and is compute-heavy, a good fit for GPUs. Decode then produces one token at a time and is limited by how fast weights and KV cache can be read from memory. In its Hot Chips write-up, SambaNova reports that across six frontier-model configurations it analyzed, decode took 75% to 97% of model-inference time. Our inference vs training explainer covers why inference stresses memory, and the KV cache explainer covers the cache the decode phase reads.

The Supermicro systems follow that split: GPUs read the prompt, SN50 chips write the response. SambaNova argues this lets operators add inference capacity in existing data centers, because its racks do not need the rack power density of current GPU systems, and lets them keep using GPUs they already own. Those are SambaNova’s claims; no independent measurements of the combined system have been published.

SambaNova’s ownership and funding are on its company profile; other accelerators are compared in our AI chips table.